CVE-2024-45817
HIGH EPSS 41.7%
Published Sep 25, 20241y ago · Modified Jun 17, 20262w ago
7.3 CVSS 3.1
Published Sep 25, 2024 1y ago
Last Modified Jun 17, 2026 2w ago
Description
In x86's APIC (Advanced Programmable Interrupt Controller) architecture, error conditions are reported in a status register. Furthermore, the OS can opt to receive an interrupt when a new error occurs. It is possible to configure the error interrupt with an illegal vector, which generates an error when an error interrupt is raised. This case causes Xen to recurse through vlapic_error(). The recursion itself is bounded; errors accumulate in the the status register and only generate an interrupt when a new status bit becomes set. However, the lock protecting this state in Xen will try to be taken recursively, and deadlock.
CVSS Details
Base Score
Exploitability
Impact
Vector string
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:L/I:L/A:L Attack Vector Network
Attack Complexity Low
Privileges Required None
User Interaction None
Scope Unchanged
Confidentiality Low
Integrity Low
Availability Low
Threat Intelligence
EPSS Exploit Probability
41.7% percentile
Exploit & Patch Status
No Known Exploit
Patch Available
Weaknesses 1
CWE-209
Affected Products 1
| Vendor | Product | Version | Range |
|---|---|---|---|
| xen | xen | * | ≥4.5.0 |
References 3
- openwall.com http://www.openwall.com/lists/oss-security/2024/09/24/1
- xenbits.xen.org http://xenbits.xen.org/xsa/advisory-462.html
- xenbits.xenproject.org https://xenbits.xenproject.org/xsa/advisory-462.html
Remediation
- xenbits.xen.org http://xenbits.xen.org/xsa/advisory-462.html
- xenbits.xenproject.org https://xenbits.xenproject.org/xsa/advisory-462.html