CVE-2024-42279
MEDIUM EPSS 13.0%
Published Aug 17, 20241y ago · Modified Jun 17, 20262w ago
5.5 CVSS 3.1
Published Aug 17, 2024 1y ago
Last Modified Jun 17, 2026 2w ago
Description
In the Linux kernel, the following vulnerability has been resolved: spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer While transmitting with rx_len == 0, the RX FIFO is not going to be emptied in the interrupt handler. A subsequent transfer could then read crap from the previous transfer out of the RX FIFO into the start RX buffer. The core provides a register that will empty the RX and TX FIFOs, so do that before each transfer.
CVSS Details
Base Score
Exploitability
Impact
Vector string
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H Attack Vector Local
Attack Complexity Low
Privileges Required Low
User Interaction None
Scope Unchanged
Confidentiality None
Integrity None
Availability High
Threat Intelligence
EPSS Exploit Probability
13.0% percentile
Exploit & Patch Status
No Known Exploit
Patch Available
Affected Products 2
References 3
- git.kernel.org https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80
- git.kernel.org https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75
- git.kernel.org https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927
Remediation
- git.kernel.org https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80
- git.kernel.org https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75
- git.kernel.org https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927